Analog Design Engineer with High-speed IO design

We are seeking a Senior Analog Design Engineer with deep expertise in High‑Speed I/O (HSIO) and SerDes design to help build next‑generation analog and mixed‑signal IPs. In this high‑impact role, you will take ownership of architecture, circuit design, simulations, verification, and silicon bring‑up for multi‑Gbps interfaces on advanced technology nodes.

You will work on complex, performance‑driven designs and influence key architectural decisions. The role provides strong technical visibility, hands‑on design challenges, and the opportunity to collaborate with experienced teams across digital, physical design, packaging, and systems engineering. You will also mentor junior engineers and contribute to shaping design methodologies and best practices.

Key Responsibilities

• Hands-on design experience in High-Speed I/O (HSIO) and SerDes PHY