Analog IC Layout Engineer

Chipright
Part Time France, France Engineers
Posted:
February 27, 2026
Location:
France, France, France

Job Description

Analog Layout Engineer
Chipright seeks highly motivated and experienced Analog Layout development engineer to work on high speed interface applications for our customer.
 
 Requirements

 
Analog Layout Engineer – France
 
Requirements
• 7+ years’ minimum experience in Analog Layout
• Experience in Layout of blocks such as PLLs, Transceivers, Receivers
• Experience working on deep sub-micron CMOS (28nm)
• Proficient with Cadence tools
• Ability to influence the architecture-level and design to ensure design layout can be achieved
• Experience with Floor Planning, Power Routing and ESD level design
• Experience with Place & Route, Layout Finishing
• Experience with Design Rule Checking (DRC) and all aspects of Physical Verification

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Job Overview

Job Type: Part Time
Location: France, France
Posted: February 27, 2026
Deadline: April 08, 2026