Analog Layout Engineer

Chipright

Part Time france, france Engineers

Posted:

June 04, 2026

Location:

france, france, France

Job Description

Analog Layout EngineerJob description: Experience in manual full-custom Analog layout of IC in CMOS/Bi-CMOS process.
Experience with high frequency layout
design verification and debugging such as DRC, ERC, ESDDRC, LVS, ANTENNA DRC, using verification tool such as PVS.
Floor planning from sub-block to chip top level
Very organized and result oriented
Very good understanding of matching techniques

Apply for this Job

Submit your application for the Analog Layout Engineer position at Chipright.

Apply Now Save for Later

Job Overview

Job Type: Part Time

Location: france, France

Posted: June 04, 2026

Deadline: July 14, 2026