Application Engineering II: Silicon Package Board

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Cadence Design Systems is looking for a Application Engineer II: Silicon Package Board (SPB) team as a full-time engineer focused on Advanced Packaging Design. If you like to architect and develop solutions for challenging problems in a fast and innovative paced environment, using state of the art technology this is a great opportunity.







Job Description:





+ The Candidate will be trained on the Cadence Integrated Circuit (IC) Package Design tool set, working with state-of-the-art complex IC packaging of electronics using highly integrated IC package co-design and multi-die chiplet methodologies.



+ Ability to understand schematic, layout, interposers, integrated components.



+ Working closely with our customers who are in the Advanced Packaging space


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