Application Engineering II: Silicon Package Board

Cadence Design Systems, Inc.

Full time Belo Horizonte, State of Minas Gerais Engineers

Posted:

March 02, 2026

Location:

Belo Horizonte, State of Minas Gerais, Brazil

Job Description

Description
 :  The Candidate will be trained on the Cadence Integrated Circuit (IC) Package Design tool set, working with state-of-the-art complex IC packaging of electronics using highly integrated IC package co-design and multi-die chiplet methodologies.
Ability to understand schematic, layout, interposers, integrated components. 
Working closely with our customers who are in the Advanced Packaging space
Helping customers to adopt and proliferate our packaging solutions
Consulting customers to understand their flow requirements and creating solutions that best meet their needs
Conducting technical presentations, technical training, and product demonstrations, including development of customized presentations
Supporting technical evaluations and benchmarks
Collaborating with Sales Management to identify and prioritize opportunities, and to assist in developing winning sales strategies
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Job Overview

Job Type: Full time

Location: Belo Horizonte, Brazil

Posted: March 02, 2026

Deadline: April 11, 2026