ASIC RTL/SoC Design Engineer SG

Responsibilities:

• Lead RTL design, simulation, and verification efforts for TetraMem ASIC/SoC products, ensuring robust and efficient designs.
• Integrate and validate IP blocks within the larger system, ensuring seamless functionality and compatibility.
• Thoroughly comprehend both internal and external requirements, conducting Power, Performance, and Area (PPA) analysis to optimize design trade-offs.
• Collaborate closely with the backend team, participating in RTL coding, implementation, and synthesis stages to ensure successful tapeout.
• Develop and maintain reusable internal intellectual properties (IPs) tailored for AI and/or in-memory computing applications
• Provide crucial support for Post-Si testing and validation, diagnosing and rectifying issues to ensure the overall functionality and quality of the product.
• Play a mentorship role by guiding and coaching junior engineers, sharing expertise and best practices to fos...