Chip lead

We are seeking a highly skilled & motivated Chip Lead with 15+ years of experience to own the overall chip architecture and design execution
Lead multi-block design integration
Manage handoff and sign-off of key stages: RTL freeze, synthesis, place & route, static timing analysis, and DFT.
Drive IP integration, clocking strategy, power domain definition
Cross-Functional Collaboration
Identify and mitigate design and schedule risks
Engage with external IP vendors, EDA tool providers
Education/Qualification
Required - Bachelor’s in Electrical Engineering, Electronics, or Computer Engineering
Preferred - Master’s or Ph D in VLSI Design, Microelectronics, or Computer Architecture
Certifications - Not mandatory, but advanced coursework or certification in So C design or project management is beneficial
Competence/Certifications
Strong background in:
Digital IC design (RTL to GDSII)
System-level architecture and IP integration
Timing closure (STA)...