US
Posted:
March 02, 2026
Location:
Folsom, California, United States
Job Description
TOP MUST HAVE SKILLS:
- Circuit level simulations for high-speed I/O circuits
- Signal integrity (SI) & power integrity (PI)
- Bump, RDL, package and power/grid layout creation
Key Responsibilities:
o Design and develop high-speed I/O circuits for advanced process nodes.
o Perform system and circuit-level simulations to evaluate and optimize I/O performance.
o Collaborate with Signal Integrity and Power Integrity (SIPI) teams to analyze, model, and optimize signal and power integrity for high-speed designs.
o Work closely with Package design team and Analog design team to analyze the interposer design.
o Conduct system-level modeling of IO interfaces for performance assessment.
Qualifications:
o BSEE or MSEE or similar design equivalent experience.
o 5+ years’ experience in physical design or automated layout creation
- Circuit level simulations for high-speed I/O circuits
- Signal integrity (SI) & power integrity (PI)
- Bump, RDL, package and power/grid layout creation
Key Responsibilities:
o Design and develop high-speed I/O circuits for advanced process nodes.
o Perform system and circuit-level simulations to evaluate and optimize I/O performance.
o Collaborate with Signal Integrity and Power Integrity (SIPI) teams to analyze, model, and optimize signal and power integrity for high-speed designs.
o Work closely with Package design team and Analog design team to analyze the interposer design.
o Conduct system-level modeling of IO interfaces for performance assessment.
Qualifications:
o BSEE or MSEE or similar design equivalent experience.
o 5+ years’ experience in physical design or automated layout creation
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Job Type:
Full-time
Location:
Folsom, California, United States
Posted:
March 02, 2026
Deadline:
April 11, 2026