IC
Posted:
March 02, 2026
Location:
Switzerland, Vaud, Switzerland
Job Description
IC Design specialist of 9+ years | Connecting companies and talented engineers
My client is seeking a highly skilled and motivated DFT (Design for Testability) Engineer to join their team in Lausanne, Switzerland. This is an exciting opportunity for a professional with a strong background in DFT methodologies and a passion for innovation. The successful candidate will play a critical role in ensuring the testability and reliability of complex designs, contributing to the development of cutting‑edge technology.
Responsibilities
As a DFT Engineer, your key responsibilities will include:
- Performing hierarchical MBIST and scan insertion, as well as BSD implementation
- Generating ATPG patterns, conducting coverage analysis, and achieving high coverage metrics
- Simulating patterns with timing and defining test mode timing constraints
- Analyzing timing reports and ensuring timing convergence
- Developin...
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Job Type:
Full-time
Location:
Switzerland, Switzerland
Posted:
March 02, 2026
Deadline:
April 11, 2026