Design Verification Engineer

Work Location: Penang, Malaysia
Experience: 7+ years
No of positions : 6
【Responsibilities】
1.Develop detailed verification plans based on design specifications and architectural requirements.
2.Create and maintain testbenches for complex digital designs using SystemVerilog and UVM (Universal Verification Methodology).
3.Write, debug, and execute test cases to verify functionality, performance, and power consumption of our SoC and AI-SOC products.
4.Collaborate with design engineers to identify, analyze, and resolve design issues.
5.Conduct coverage analysis and drive verification closure to ensure all functional requirements are met.
6.Mentor junior verification engineers, providing technical guidance and support.
7.Continuously improve verification processes and methodologies to enhance efficiency and effectiveness.
8.Participate in design and verification reviews, providing constructive feedback and recommendations.
9.Stay updated with the latest ...