Design Verification Engineer

Talent Acquisition Specialist-ThunderSoft

About the job

We welcome candidates of any nationality to apply for this position.

Requirements

• Digital ASIC/SOC design verification. The candidate should have good understanding on ASIC/SOC design flow and should have:
• Strong coding with Verilog and SystemVerilog
• Good knowledge of design verification methodology UVM
• Many experiences with sequence creation, functional cover groups and assertion coding
• Be familiar with scripting language, such as Perl, C shell, Makefile, Ruby
• Has one or more of the following experience/knowledge
• Such as X86/ARM/8051 architecture, AMBA(AXI/AHB/APB) bus, USB(3.0/2.0/1.1;SSIC/HSIC/host/device/OTG) system, NAND Flash host controller/BCH/double-data-rate interface, Universal Flash Storage, PCI-E/PCI bus, low power design, clock generation and control, SD/eMMC host controller, SATA/SAS, Legacy IPs (SPI/S...