DFT Engineer

Chipright
Part Time Germany, Germany Engineers
Posted:
March 02, 2026
Location:
Germany, Germany, Germany

Job Description

ASIC DFT Engineer

Chipright seeks highly motivated and experienced Design For Test (DFT) engineer to work closely with our customer. We require an engineer to work with leading-edge EDA tools in delivering an RTL design to GDSII. This is a fantastic opportunity for talented engineers to work within a team of highly experienced engineers.

Requirements
  • 7+ years experience in development of ASIC designs
  • Proficient with VHDL & Verilog
  • Proficient with Synopsys DC Shell & Primetime
  • Ability to influence the architecture-level and RTL-level design to ensure performance and area targets can be achieved
  • Experience with scan synthesis and ATPG
  • Experience with Scan Insertion Logic, Scan cells, Memory BIST, JTAG, Boundary Scan, Design Sign off, Constraints
  • Experience with UPF
  • Experience with scripted flows – Tcl, Perl
  • Experience in developing multiple process/library options
  • Experience in working with...
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    Job Overview

    Job Type: Part Time
    Location: Germany, Germany
    Posted: March 02, 2026
    Deadline: April 11, 2026