Un
Posted:
February 25, 2026
Location:
Singapore, Singapore, Singapore
Job Description
- Responsible for scan insertion, MBIST, ATPG for SOC based design using industry standard EDA tools.
- Generate test vectors, analyze and improve test coverage, reduce test time and test cost.
- Perform pre/post -layout scan and MBIST simulations.
- Work with designers on STA, physical, power and logical issues related to DFT.
- Work with test engineers to bring up all test patterns before production test release.
Requirements
Engineering and at least 5 years of experience in DFT implementation.
including scan (Stuck -At, At -Speed, Path -Delay), scan test compression,
boundary scan and MBIST.
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Job Type:
Full-time
Location:
Singapore, Singapore
Posted:
February 25, 2026
Deadline:
April 06, 2026