Digital Design Engineer: Timing & PLL Synchronization

Ciena Corporation

Full-time ahuntsic north, qc IT & Technology

Posted:

June 01, 2026

Location:

ahuntsic north, qc, Canada

Job Description

                    A global leader in connectivity solutions is seeking a Digital Design Engineer to focus on digital synchronization and PLL development. This role involves designing optimized timing solutions and collaborating with various engineering teams. Candidates should possess a degree in Electrical or Computer Engineering and expertise in digital design methodologies. Competitive compensation and comprehensive benefits are offered.
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Job Overview

Job Type: Full-time

Location: ahuntsic north, Canada

Posted: June 01, 2026

Deadline: July 11, 2026