Posted:
June 05, 2026
Location:
jalisco, jalisco, Mexico

Job Description

**** Micron Semiconductor Mexico, S.De R.L. de C.V. is seeking a DRAM Engineering Group Layout Designer to translate schematics into layout and develop methodologies for issue resolution.
You will collaborate with design and other engineering teams to apply various layout techniques.The ideal candidate will have over 4 years of experience with Cadence VLE/VXL and Calibre DRC/LVS, a Bachelor's degree in Electrical or related fields, and a strong electrical engineering background.
Responsibilities include designing and verifying analog and digital layouts.
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Job Overview

Job Type: Full-time
Location: jalisco, Mexico
Posted: June 05, 2026
Deadline: July 15, 2026