Mi
DRAM Layout Engineer - IP Design & Tapeout Expert
Micron Technology
Full-time
tlaquepaque, tlaquepaque
Other-General
Posted:
May 30, 2026
Location:
tlaquepaque, tlaquepaque, Mexico
Job Description
Micron Technology in Tlaquepaque, Mexico is seeking a skilled individual for the DRAM Design Engineering Group. You will be responsible for translating schematics into layouts, managing logistics and resources, and developing methodologies for issue resolution. The role involves close collaboration with various engineering teams globally.
Applicants should have a Bachelor’s degree in Electrical Engineering and at least 3 years of experience in layout designs in advanced CMOS processes. The position emphasizes leadership, problem-solving skills, and proficiency with Cadence tools.
#J-18808-LjbffrApply for this Job
Submit your application for the DRAM Layout Engineer - IP Design & Tapeout Expert position at Micron Technology.
Apply Now Save for LaterJob Overview
Job Type:
Full-time
Location:
tlaquepaque, Mexico
Posted:
May 30, 2026
Deadline:
July 09, 2026