Formal verification engineer

Job Title: Formal Verification Engineer
Location: Bangalore
Experience: 4+Years
Job Type: Full-time
Industry: Semiconductor / ASIC Design / EDA
Education: B. E./B. Tech or M. E./M. Tech in ECE/EEE/Computer Engineering
Job Description:
We are looking for a highly motivated Formal Verification Engineer to join our Design Verification team. The candidate will be responsible for developing and executing formal verification strategies to ensure functional correctness of complex IP and So C designs.
Key Responsibilities:
Define and implement formal verification strategies and plans.
Develop formal properties and assertions for critical design blocks.
Apply formal techniques such as property checking, sequential equivalence checking , and formal coverage.
Analyze formal results, identify unreachable or vacuous properties, and refine models.
Collaborate closely with RTL designers, DV engineers, and architects.
Integrate formal into overall verification...