FPGA/RTL Design Engineer

UST
Full-time , Penang, Malaysia, Penang Engineering
Posted:
March 03, 2026
Location:
, Penang, Malaysia, Penang, Malaysia

Job Description

We are seeking an experienced Senior FPGA/RTL Design Engineer with strong technical expertise in RTL design, VHDL, Verilog, Java, C, and hands-on experience with FPGA devices and tools. The ideal candidate will design, develop, verify, and optimize digital hardware architectures for high-performance embedded and hardware systems.

Key Responsibilities

FPGA / RTL Design

  • Design, and implement RTL modules using VHDL and Verilog.
  • Perform timing analysis, synthesis optimizations, and resource utilization improvements.
  • Integrate, simulate, test, and debug FPGA designs in both pre-silicon and lab environments.

Verification & Validation

  • Create and execute testbenches and verification plans for module- and system-level functionality.
  • Use simulation tools (ModelSim, QuestaSim) to validate RTL behavior.
  • Perform hardware bring-up, debugging, and validation using oscilloscopes, logic analy...

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Job Overview

Job Type: Full-time
Location: , Penang, Malaysia, Malaysia
Posted: March 03, 2026
Deadline: April 12, 2026