IC Package Design Engineer

UST Malaysia
Full-time , Penang, Malaysia, Penang Engineering
Posted:
March 03, 2026
Location:
, Penang, Malaysia, Penang, Malaysia

Job Description

As a IC Package Design Engineer, you will be responsible for executing high density package layout designs across product portfolios (Test Chips, CPUs, Chipsets, SoC designs, Test Vehicles and more)

Responsibilities

  • Routing feasibility studies
  • Signal breakout & full path routing, including Length matching (Group/ Diff Pair) for Low-Speed IOs and High-Speed IOs (e.g. DDR, PCIe, SERDES)
  • Power routing
  • Package Ballmap assignment
  • VSS Stitching (Vertical/ Horizontal)
  • Design rule checks (DRCs) and DRC cleanup (e.g. Mentor DRC and PLA eDRC)
  • Adhesion hole generation and touchup
  • Routing over void report generation and fixes
  • Return path report generation and cleanup
  • Using the Mentor Graphics Xpedition PCB software to design the substrate in compliance with existing design rules, electrical requirements, and processes
  • Work together with assigned PDE to deliver Package d...

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Job Overview

Job Type: Full-time
Location: , Penang, Malaysia, Malaysia
Posted: March 03, 2026
Deadline: April 12, 2026