Re
Posted:
February 21, 2026
Location:
Tianjin, China, China
Job Description
Intern- Analog Design
Job Description
**Job Purpose and Dimensions:**
_D_ evelop, qualify, validate, design-in, and support next-generation IC products for applications such as Opamp, interface and Isolation chip.
**Principal Accountabilities:**
+ Design, debug and test new products and support old products.
+ Use different kinds of design tools to design and verify analog circuit.
+ Work closely with back-end designers to correctly implement analog designs to layout and do post-layout simulation.
+ Work closely with VE/ATE testing engineers at lab for chip debugging, testing and necessary customer support.
+ Understand and verify any new manufacture process or flow.
+ Write block level design spec according to chip spec. Write design guide of block level.
+ Prove design to satisfy the chip spec through checklist, simulation result in design review.
Qualifications
只接受2027年毕业的硕士研究生,电子专业或模拟设计方向。
可确保...
Job Description
**Job Purpose and Dimensions:**
_D_ evelop, qualify, validate, design-in, and support next-generation IC products for applications such as Opamp, interface and Isolation chip.
**Principal Accountabilities:**
+ Design, debug and test new products and support old products.
+ Use different kinds of design tools to design and verify analog circuit.
+ Work closely with back-end designers to correctly implement analog designs to layout and do post-layout simulation.
+ Work closely with VE/ATE testing engineers at lab for chip debugging, testing and necessary customer support.
+ Understand and verify any new manufacture process or flow.
+ Write block level design spec according to chip spec. Write design guide of block level.
+ Prove design to satisfy the chip spec through checklist, simulation result in design review.
Qualifications
只接受2027年毕业的硕士研究生,电子专业或模拟设计方向。
可确保...
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Submit your application for the Intern- Analog Design position at Renesas.
Apply Now Save for LaterJob Overview
Job Type:
Full-time
Location:
Tianjin, China
Posted:
February 21, 2026
Deadline:
March 06, 2026