Posted:
February 20, 2026
Location:
Nanjing, Jiangsu, China

Job Description

Description

:
  • Responsible for custom layout floorplan, matching guides, resistor/capacitor placement, reduce coupling & noise, sensitive signals routing, mix-signals routing, etc.
  • Responsible for custom layout top level hierarchy floorplan for blocks/powers
  • Responsible for high-speed mixed-signal PHY such as SerDes, USB, DDR, etc
  • Responsible for cooperation with analog circuit design team to ensure high efficiency and quality for analog layout design.
  • Position Requirements:

  • BSEE degree with 4+ years of applicable experience in analog/custom layout of advanced technology nodes
  • Proficient with Layout edit/verify tools, like Virtuoso XL, Pegasus/Calibre DRC/LVS, etc.
  • Proficient with EMIR tools, like Voltus-FI
  • Hands-on experience conducting DRC/LVS/ERC analysis, EMIR analysis, and recommending appropriate solutions
  • Fundamental understanding of IC design technology and process/methodology
  • Apply for this Job

    Submit your application for the Lead Custom Layout Design Engineer position at Cadence Design Systems, Inc..

    Apply Now Save for Later

    Job Overview

    Job Type: Full time
    Location: Nanjing, China
    Posted: February 20, 2026
    Deadline: April 01, 2026