Principal Design Engineer

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Job Description:

We are looking for strong technical team lead for IP Integration, subsystem creation, and QA for our SSG IP Integration and QA engineering team. The role would include working with existing RTL, integration of PHYs and controllers to create sub-systems, and addition of new features. In addition, responsibilities include ensuring various customer configurations are clean as part of verification regressions, and ensuring design is clean for all QA aspects in both Front End and Back End (these includes items like being Timing/LINT/RDC/CDC clean, consistency checks for all IP views etc. A critical part of this role is for the technical lead to also oversee the adoption and roll out of Agentic AI initiatives into all aspects of IP Integration and QA including multi-agent connections in CDNS EDA flows. They will work closely with various RnD IP leaders...