Posted:
March 02, 2026
Location:
Noida, India, India

Job Description

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Cadence Design Systems is looking for a highly motivated engineer to be part of the Modus R&D team, with a focus on validating and supporting Design-for-test (DFT) technologies. Candidate must have 7+ years of experience in DFT/ATPG/ASIC Design flows and knowledge of RTL Verilog/VHDL coding styles, Synthesis. This position requires excellent communication skills (written and oral) to interface with Product Engineers (PEs) and R&D and will occasionally also involve direct customer support responsibilities. Will work on complex problems that require innovative thinking, debugging customer reported problems and collaboration with R&D to propose out-of-box solutions with emphasis on robustness, PPA and scalability.

Role Responsibility

Work as a DFT Product Validation Engineer on insertion and validation of DFT technologies such as 1500 Wrapper, Boundary S...

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Job Overview

Job Type: Full-time
Location: Noida, India
Posted: March 02, 2026
Deadline: March 07, 2026