Posted:
March 03, 2026
Location:
Austin, Texas, United States

Job Description

Principal Static Timing Analysis (STA) Engineer



About the Role:

We are seeking a highly experienced Principal STA Engineer to play a key technical leadership role in the development of next-generation semiconductor products. In this role, you will own complex blocks and full-chip STA analysis, and act as a technical authority within the Physical Design team. You will work closely with architecture, RTL, DFT, and signoff teams to deliver high-performance, low-power, and area-efficient designs in advanced technology nodes. This role is ideal for a senior individual contributor who thrives on solving the hardest physical design problems and mentoring other engineers.



Key Responsibilities:

• Static Timing Analysis

Own end-to-end timing analysis for large blocks and full chip:

• Implement Foundry signoff into Tempus/Primetime signoff requirements

• Validate S...

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Job Overview

Job Type: Full-time
Location: Austin, United States
Posted: March 03, 2026
Deadline: April 12, 2026