RTL Design and Integration Engineer, TPU and ML

Google
Full-time Sunnyvale, CA other-general
Posted:
June 17, 2026
Location:
Sunnyvale, CA, United States

Job Description

RTL Design and Integration Engineer, TPU and ML

_corporate_fare_ Google _place_ Sunnyvale, CA, USA

**Mid**

Experience driving progress, solving problems, and mentoring more junior team members; deeper expertise and applied knowledge within relevant area.

**Minimum qualifications:**

+ Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
+ 4 years of experience in ASIC RTL design, with a focus on clocking, reset, or timing-critical RTL development.
+ Design experience optimizing for performance, power, and area.
+ Experience with digital design fundamentals and microarchitecture design.
+ Experience working cross-functionally with DV and PD teams.

**Preferred qualifications:**

+ Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
+ 4 years of RTL...

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Job Overview

Job Type: Full-time
Location: Sunnyvale, United States
Posted: June 17, 2026
Deadline: June 22, 2026