RTL / Digital Design Engineer

About Us SerdesWorks
is a deep-tech semiconductor startup focused on developing high-performance SerDes and interface IP solutions for next-generation data communication systems, including PCIe, UCIe, MIPI, DDR, and high-speed chiplet interconnects. We are building advanced PHY and digital subsystems in TSMC advanced nodes (22nm / 12nm and beyond), targeting applications in AI compute, data centers, storage, and mobile platforms.
Role Overview We are seeking a highly motivated
RTL / Digital Design Engineer
to develop and implement high-speed interface digital subsystems (PCS / controller logic) for SerDes and PHY IP. You will work closely with analog designers, system architects, and verification engineers to deliver production-quality IP.
Key Responsibilities 1. RTL Design & Architecture Design and implement RTL for PHY PCS (Physical Coding Sublayer) and digital control blocks Develop modules for: - Encoding/decoding (e.g., 8b/10b, 128b/130b, 256b/257b) - Lane alignment...