Me
Posted:
June 06, 2026
Location:
Hsinchu City, Taiwan Province, Taiwan
Job Description
Job Description1.Develop fault simulation flow for function safety.
2.Deploy fault simulation for safety IPs
3.Co-work with IP design verification teams to achieve pre-silicon verification of hardware safety requirements
#LI-LL1
Requirement1.10+ years of engineering experience in IC design industry
2.5+ experience in design verification
3.Capability to collaborate with cross-organizations
4.Knowledge of ISO 26262, including the function safety aspects of design verification (preferred)
5.Experience in fault simulation (preferred)
2.Deploy fault simulation for safety IPs
3.Co-work with IP design verification teams to achieve pre-silicon verification of hardware safety requirements
#LI-LL1
Requirement1.10+ years of engineering experience in IC design industry
2.5+ experience in design verification
3.Capability to collaborate with cross-organizations
4.Knowledge of ISO 26262, including the function safety aspects of design verification (preferred)
5.Experience in fault simulation (preferred)
Apply for this Job
Submit your application for the Safety Verification Methodology Engineer position at MediaTek.
Apply Now Save for LaterJob Overview
Job Type:
Full-time
Location:
Hsinchu City, Taiwan
Posted:
June 06, 2026
Deadline:
July 16, 2026