Satellite FPGA Engineer: RTL & High-Speed I/O (Hybrid)

Sateliot
Full-time barcelona, cataluña Ingeniería y tecnología
Posted:
June 04, 2026
Location:
barcelona, cataluña, Spain

Job Description

Sateliot in Barcelona is seeking an experienced RTL Designer to join our Payload team. You will be responsible for designing, integrating, and verifying digital logic for our cutting-edge satellite technology.

The ideal candidate will have a strong background in SystemVerilog or VHDL and experience with FPGA platforms. Enjoy a hybrid working model, flexible benefits, and the opportunity to contribute to groundbreaking projects in the New Space sector.

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Job Overview

Job Type: Full-time
Location: barcelona, Spain
Posted: June 04, 2026
Deadline: July 14, 2026