Senior ASIC Verification Engineer (SystemVerilog/UVM)

A leading design services company in Ottawa seeks a Senior ASIC Verification Specialist with over 7 years of experience. This role involves using SystemVerilog and UVM to verify complex ASIC designs within a strong technical team. Candidates should be proficient in hardware description languages and have experience with various architectures. The position offers a salary range of $120,000 to $170,000, with additional benefits, and emphasizes a work-life balance in a stimulating environment.
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