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Posted:
March 01, 2026
Location:
Mississauga, Peel Region, Canada
Job Description
A leading semiconductor technology company seeks a visionary technical leader to drive the development of DDR PHY IP solutions. This role requires a deep understanding of semiconductor design and the ability to manage and mentor high-performing teams. The ideal candidate has extensive experience in Verilog and SystemVerilog, excels in collaborative environments, and is committed to delivering cutting-edge innovation in silicon technologies. Join us to shape the future of high-performance, low-latency silicon solutions.
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Submit your application for the Senior DDR PHY IP Design Leader position at Synopsys, Inc..
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Job Type:
Full-time
Location:
Mississauga, Canada
Posted:
March 01, 2026
Deadline:
April 10, 2026