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Senior Digital Design and IP Integration Engineer
MediaTek
Full-time
Hsinchu City, Taiwan Province
Computer Occupations
Posted:
June 08, 2026
Location:
Hsinchu City, Taiwan Province, Taiwan
Job Description
Job Description1. Own the top-level integration of internal and third-party IPs into SOC or FPGA platform.
2. Ensure interface compatibility, clock/reset domain correctness. Resolve integration issues including timing, CDC/RDC, and floorplan.
3. Work closely with architect to define specification, support physical design team through synthesis constraints and integration guidance, partner with firmware and validation teams to ensure smooth bring-up and validation.Requirement1. Master's degree in Electrical Engineering, Computer Engineering, or a related field.
2. 5+ years of experience of hands-on experience in ASIC/SOC design with strong proficiency in RTL design.
3. Experience with EDA tools for synthesis, lint, CDC, simulation, and debug.
4. Experience with high speed interface and DRAM controller are preferred.
2. Ensure interface compatibility, clock/reset domain correctness. Resolve integration issues including timing, CDC/RDC, and floorplan.
3. Work closely with architect to define specification, support physical design team through synthesis constraints and integration guidance, partner with firmware and validation teams to ensure smooth bring-up and validation.Requirement1. Master's degree in Electrical Engineering, Computer Engineering, or a related field.
2. 5+ years of experience of hands-on experience in ASIC/SOC design with strong proficiency in RTL design.
3. Experience with EDA tools for synthesis, lint, CDC, simulation, and debug.
4. Experience with high speed interface and DRAM controller are preferred.
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Apply Now Save for LaterJob Overview
Job Type:
Full-time
Location:
Hsinchu City, Taiwan
Posted:
June 08, 2026
Deadline:
July 18, 2026