Senior Director, IO Analog Design Engineering

**Job Details:**

**Job Description:**

The Hard IP and Test Chip Development team, within Intel's Central Engineering Group, is responsible for delivering industry defining analog and mixed signal IP for Intel's Client, Datacenter, AI and Foundry customers. The IO team owns high-speed serial IO and die-to-die interfaces across multiple advanced process nodes.

As the senior engineering leader for this global organization, you will shape Intel's future of IO and chiplet interconnect technology.

This leader will be responsible for the following:

+ Setting and continuously refining a multi-generational roadmap for HSIO and D2D IP development, anticipating market and technology trends and architectural shifts and driving alignment across SoC, platform and product teams.
+ Engaging directly with senior Intel architects and executives to define IP landing zones and build execution plans
+ Driving IP development across architecture, logic, vali...