Senior Engineer - Memory Cell Test Structure Design and Layout

As a Scribe Array Design Engineer, you will design and validate memory cell & support circuitry‑based test structures, manage design revisions, and partner with cross‑functional teams to support process development and manufacturing integration.

Responsibilities

• Support process development activities through memory cell‑based test structure solutions by actively engaging with Process Integration, Product and Die Design, Electrical Characterization, Advanced Mask Development and Design Rule teams.
• Interpret electrical DUT (Device under Test) definition and build completed TEGs (Test Element Groups) with high confidence functionality on Silicon.
• Implement novel solutions to study failure mechanisms and monitor silicon health.
• Assist with parametric correlation and debugging to ensure design accuracy.
• Verify and validate test structure documentation and related parametric information.

Minimum Qualifications