Senior lead / manager - rtl design engineer

Job Description
- Very strong expertise in Architecture micro-architecture development
- Proven experience in RTL coding and RTL integration of sub-blocks into larger components
- Ability to analyze Block/Sub-system requirements and issues and propose solution
- Strong in So C components like Network on chip, AXI , APB and AHB protocol
- Solid understanding of clocking and reset concepts, including synchronization, generation, and division
- Very good in developing synthesis constraints, review of timing paths and timing closure
- Strong expertise in RTL linting debug and error/warning fixes using Vc Spyglass
- Deep knowledge in analyzing and resolving CDC/RDC violations
- Collaborate with cross-functional teams to ensure seamless integration of subsystems
- Need to pay Attention to detail and need to be committed towards high-quality deliverable
Location: Bangalore
Experience: 10+ yrs
About us:
Tessolve Semiconductors, a venture of Hero Electr...