Senior Member of Technical Staff

**Role Summary**

We are seeking a Senior NVM Design Engineer with 15+ years of industry experience in OTP and/or EEPROM memory design to lead the architecture, design, and delivery of high-quality non-volatile memory IPs. This role requires deep technical expertise, strong cross-functional leadership, and ownership of NVM IPs from concept through silicon qualification and production release.

**Key Responsibilities**

**Architecture & Design**

+ Lead architecture definition and circuit design of OTP and EEPROM memory IPs, including bit-cell, periphery, high-voltage devices, charge pumps, sense amplifiers, and write/erase control.
+ Define programming algorithms, redundancy schemes, reliability mechanisms, and safety features.
+ Drive PPA (Power, Performance, Area) optimization across multiple technology nodes.
+ Own top-level NVM IP micro-architecture, including interfaces to digital controllers and test logic.

**onsemi** (Nasdaq: ON...