Ca
Posted:
June 04, 2026
Location:
toronto, on, Canada
Job Description
A leading technology firm in Toronto is seeking a skilled engineer for physical design roles. The ideal candidate will lead next-generation PHY IP design and collaborate closely with the RTL and Analog teams. Responsibilities include physical design implementation and ensuring successful design tapeouts. Candidates should have a Bachelor's degree in EE/CS/IT and at least 5 years of relevant experience. This position offers the opportunity to work on challenging designs in a fast-paced environment.
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Submit your application for the Senior Physical Design Engineer: Lead Next-Gen Tapeouts position at Cadence.
Apply Now Save for LaterJob Overview
Job Type:
Full-time
Location:
toronto, Canada
Posted:
June 04, 2026
Deadline:
July 14, 2026