Senior SoC Verification Engineer: RTL/UVM Lead

A leading semiconductor company in Singapore is seeking an experienced Verification Engineer to collaborate with design engineers for SoC design verification. The ideal candidate will have a Master's degree with over 8 years of experience or a PhD with at least 3 years in a related field. Responsibilities include developing test plans, maintaining verification infrastructure, and mentoring team members. A salary range of S$80,000 - S$180,000 per year is offered, showcasing competitive compensation in a vibrant work environment.
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