Senior SoC/ASIC Verification Engineer (RTL, UVM)

A leading company specializing in SoC design and verification is seeking an experienced verification engineer. This role involves working closely with design teams to develop and document extensive test plans, manage verification environments, and mentor junior engineers. Ideal candidates hold a Master's or PhD in Electrical Engineering with substantial experience in verification methodologies and various programming languages. This position promises a dynamic working environment in the semiconductor field.
#J-18808-Ljbffr