Posted:
June 17, 2026
Location:
Folsom, CA, United States

Job Description

**Job Details:**

**Job Description:**

**About the Role**

Join Intel's Hard IP Development Group (HIPD) within the Central Engineering Organization, where innovation meets execution. Our team develops industry-leading intellectual property that powers high-performance products across Server, Client, and Networking SoCs, as well as solutions for Intel Foundry customers.

HIPD creates a comprehensive portfolio of cutting-edge Mixed Signal IPs including general purpose IOs, Digital Thermal Sensors, PLLs, Serial and Parallel IO PHYs (DDR/LPDDR, PCIe, USB, Type-C, UCIe Die-to-Die), and Ethernet PHYs. As part of our IO Post Silicon Validation Debug team, you'll work with a dynamic group of engineers who serve as the critical bridge between IP design teams and SoC customers throughout the validation and debug process.

**Key Responsibilities**

**Customer-Focused IP Enablement**

+ Provide Response for IP Questions to customers timely<...

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Job Overview

Job Type: Full-time
Location: Folsom, United States
Posted: June 17, 2026
Deadline: June 22, 2026