SOC Design Engineer

MAXLINEAR ASIA SINGAPORE PRIVATE LIMITED

Full-time singapore, singapore Other-General

Posted:

June 04, 2026

Location:

singapore, singapore, Singapore

Job Description

                    Job Responsibilities  Design digital logic with high-level description language (VHDL/Verilog) from specification 
Design quality RTL that meets all design requirement of input/output requirements, constraints, multiple clock domains, functional modes, and analog blocks 
Design RTL with low power requirement from standard power intent file input 
Design of RTL for SoC and FPGA-friendly and DFT compliant code is critical 
Design of RTL for IP development and SoC assembly 
Design of RTL for SoC Clock & Reset structures is a plus 
Verify the design through extensive test-bench simulation and ability to debug with FPGA prototyping 
Experience with Design For Test requirement is a plus 
Experience with Synthesis, and Logic Equivalent checks are added advantage 
Work with other RTL2netlist and Backend team to resolve any design issues 
 Job Requirements  Bachelor Degree...
                

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Job Overview

Job Type: Full-time

Location: singapore, Singapore

Posted: June 04, 2026

Deadline: July 14, 2026