SOC RTL Design Engineer - Low-Power & Verification Expert

MAXLINEAR ASIA SINGAPORE PRIVATE LIMITED is seeking an experienced engineer for digital logic design in Singapore. The ideal candidate will design RTL for SoCs and FPGAs while verifying designs through simulations. They should possess a Bachelor's or Master's degree in Electrical/Electronics Engineering and a solid understanding of the IC design lifecycle, including verification and silicon validation. Skills in VHDL/Verilog and low power design standards are crucial for this role.
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