Ca
Posted:
June 15, 2026
Location:
San Jose, CA, United States
Job Description
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
This is an opportunity to join a dynamic team of experienced engineers developing physical IP for industry-standard high-speed serial-links.
The successful candidate will ideally be a highly-motivated self-starter who can work independently to complete assigned tasks and contribute to project leadership. The candidate will contribute to all mixed-signal design, verification, and testing aspects. This includes circuit design and development from a high-level architectural specification, post-silicon test plan development and execution, and collaboration with the digital team to achieve functional and performance closure.
Candidate must have a thorough understanding of the following:
+ Mixed-signal circuit design fundamentals
+ Mixed-signal circuit design and verification flows
+ Cadence analog design enviro...
This is an opportunity to join a dynamic team of experienced engineers developing physical IP for industry-standard high-speed serial-links.
The successful candidate will ideally be a highly-motivated self-starter who can work independently to complete assigned tasks and contribute to project leadership. The candidate will contribute to all mixed-signal design, verification, and testing aspects. This includes circuit design and development from a high-level architectural specification, post-silicon test plan development and execution, and collaboration with the digital team to achieve functional and performance closure.
Candidate must have a thorough understanding of the following:
+ Mixed-signal circuit design fundamentals
+ Mixed-signal circuit design and verification flows
+ Cadence analog design enviro...
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Job Type:
Full-time
Location:
San Jose, United States
Posted:
June 15, 2026
Deadline:
June 20, 2026