Re
Posted:
June 06, 2026
Location:
Shanghai, China, China
Job Description
Sr Staff Analog Design Engineer (资深IC 模拟设计工程师)
Job Description
USB2-I3C HUB IC R&D.
**Key** **Responsibilities**
+ Work with analog and ASIC design team for new product development.
+ Work closely with layout designer for layout implementation.
+ Verification of performance requirements using appropriate simulation and verification tools.
+ Support test & product team with chip debugging, failure analysis, characterizations, and product release efforts.
Qualifications
+ Master’s degree or above in EE or related field.
+ 8+ years of experience on analog IC design area; experience of 40nm or 28nm process preferred,
+ Familiar with details of product development: design method, design process, CAD tool, design for test, physical design, system application.
+ Have the experience in power management ,ADC /DAC, PLL- Nice to have
+ Experience in high speed IOs design (Equalizers, Drivers, etc.) or PLL is a plus.
+ ...
Job Description
USB2-I3C HUB IC R&D.
**Key** **Responsibilities**
+ Work with analog and ASIC design team for new product development.
+ Work closely with layout designer for layout implementation.
+ Verification of performance requirements using appropriate simulation and verification tools.
+ Support test & product team with chip debugging, failure analysis, characterizations, and product release efforts.
Qualifications
+ Master’s degree or above in EE or related field.
+ 8+ years of experience on analog IC design area; experience of 40nm or 28nm process preferred,
+ Familiar with details of product development: design method, design process, CAD tool, design for test, physical design, system application.
+ Have the experience in power management ,ADC /DAC, PLL- Nice to have
+ Experience in high speed IOs design (Equalizers, Drivers, etc.) or PLL is a plus.
+ ...
Apply for this Job
Submit your application for the Sr Staff Analog Design Engineer (资深IC 模拟设计工程师) position at Renesas.
Apply Now Save for LaterJob Overview
Job Type:
Full-time
Location:
Shanghai, China
Posted:
June 06, 2026
Deadline:
June 11, 2026