System IP / RTL Design Engineer

Job Description

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Technical

Description

Key responsibilities include: " Work on RTL design of System IP blocks " Work independently while closely collaborating with other designers as well as members of verification, physical design, performance and power teams " Work on developing and maintaining Front-End Tools, Flows and Methodologies " Work on creating scripts that automate repetitive daily tasks of team members " Support Silicon bring-up activities

Requirements

Minimum requirements: " Proficient in RTL design using Verilog and System Verilog " Experienced in setting up and maintaining front-end tools for Synthesis, LEC, Lint and Low Power Analysis " Excellent debug and problem-solving skills. Experienced in Silicon bring-up activities " Experienced in timing and coverage closure " Proficient with UNIX/Linux and programming languages such as PERL, Python, TCL, and Unix Shell Scripti...